Fetch-Decode-Execute Cycle (FDE)
The Fetch-Decode-Execute Cycle is the basic process the CPU uses to run programs.The CPU repeats this cycle billions of times per second.It's how your computer does EVERYTHING - from running games to opening documents.
Why Is It Important?#
Understanding the FDE cycle means understanding how computers ACTUALLY work. This is THE most important concept in computer architecture.
The 3 Stages of FDE Cycle#
The CPU does 3 things over and over:1.
FETCH - Get an instruction from memory
2.
DECODE - Understand what the instruction means
3.
EXECUTE - Do what the instruction says
Then it repeats... billions of times!
The Complete FDE Cycle - Visual Overview#
STAGE 1: FETCH - Get the Instruction#
What Happens in Fetch?#
The CPU gets an instruction from memory.Step-by-Step#
Step 1: PC (Program Counter) = 100
↓
"Next instruction is at address 100"
Step 2: PC sends address 100 to MAR (Memory Address Register)
↓
MAR = 100
Step 3: MAR sends address via Address Bus
↓
Address Bus carries 100 to Memory
Step 4: Control Unit sends READ signal via Control Bus
↓
"Memory, please send me the instruction at address 100"
Step 5: Memory finds instruction at address 100: "ADD 5, 3"
↓
Memory sends "ADD 5, 3" via Data Bus
Step 6: MDR (Memory Data Register) receives instruction
↓
MDR = "ADD 5, 3"
Step 7: CIR (Current Instruction Register) gets copy
↓
CIR = "ADD 5, 3"
Step 8: PC increments (adds 1)
↓
PC = 100 → PC = 101
(Points to next instruction)
Diagram - Fetch Stage Detailed#
What Registers Are Used in Fetch?#
| Register | What It Does |
|---|
| PC | Holds address of instruction to fetch |
| MAR | Holds the address (copy from PC) |
| MDR | Receives the instruction from memory |
| CIR | Receives copy of instruction |
What Buses Are Used in Fetch?#
| Bus | Direction | Carries |
|---|
| Address Bus | CPU → Memory | Address (100) |
| Data Bus | Memory → CPU | Instruction (ADD 5, 3) |
| Control Bus | CPU → Memory | READ signal |
STAGE 2: DECODE - Understand the Instruction#
What Happens in Decode?#
The Control Unit reads the instruction and figures out what it means.How Instructions Are Structured#
Every instruction has 2 parts:Instruction: ADD 5, 3
┌─────────────────┐
│ OPCODE │ = What operation to do
│ (Operation) │ = Example: ADD, SUBTRACT, JUMP
└─────────────────┘
┌─────────────────┐
│ OPERAND │ = What to do it to
│ (Data/Address)│ = Example: 5, 3, or memory location
└─────────────────┘
Example: Breaking Down Instructions#
| Instruction | Opcode | Operand 1 | Operand 2 | Meaning |
|---|
| ADD 5, 3 | ADD | 5 | 3 | Add the numbers 5 and 3 |
| LOAD 200 | LOAD | Address 200 | - | Get data from memory address 200 |
| STORE ACC | STORE | Accumulator | - | Save accumulator to memory |
| JUMP 500 | JUMP | Address 500 | - | Go to instruction at address 500 |
| COMPARE 10 | COMPARE | 10 | - | Compare something with 10 |
Decode Process#
CIR contains: "ADD 5, 3"
↓
Control Unit reads CIR
↓
Control Unit splits instruction:
- Opcode: ADD
- Operand 1: 5
- Operand 2: 3
↓
Control Unit understands:
"I need to ADD two numbers: 5 and 3"
"I need to use the ALU"
"I need to store result in ACC"
↓
Ready to EXECUTE
What Happens During Decode#
1.
Instruction is read - Control Unit looks at CIR
2.
Instruction is split - Breaks into Opcode and Operand
3.
Meaning is understood - "This is ADD, this is SUBTRACT, etc."
4.
Resources are prepared - Gets ready to execute
STAGE 3: EXECUTE - Do the Instruction#
What Happens in Execute?#
The CPU actually performs the instruction.What Can Happen in Execute?#
The action depends on the instruction:Instruction: ADD 5, 3
What happens:
- ALU receives 5 and 3
- ALU adds: 5 + 3 = 8
- Result (8) stored in ACC (Accumulator)
Memory/Registers before: ACC = ?
Memory/Registers after: ACC = 8
2. Store Data to Memory#
Instruction: STORE 200
What happens:
- Data in ACC is written to memory
- Memory address is 200
- ACC value is written to address 200
Memory location 200 before: [Empty]
Memory location 200 after: [8]
3. Load Data from Memory#
Instruction: LOAD 300
What happens:
- Data from memory address 300 is read
- Data is stored in ACC
- Now ACC has the value from memory
Memory location 300: [15]
ACC before: [8]
ACC after: [15] (loaded from memory)
4. Make a Decision (Conditional Jump)#
Instruction: IF ACC > 0 THEN JUMP 500
What happens:
- Check if ACC is greater than 0
- If TRUE: PC jumps to address 500
- If FALSE: PC continues normally
Result: The next instruction comes from address 500 (if true)
or from the normal sequence (if false)
5. Comparison#
Instruction: COMPARE ACC WITH 10
What happens:
- ALU compares ACC value with 10
- Sets status flags (Equal, Greater, Less)
- These flags used by later instructions
Example:
If ACC = 10: Equal flag = True
If ACC = 15: Greater flag = True
If ACC = 5: Less flag = True
Execute Diagram#
Complete FDE Cycle - Real Example#
Example: Add Two Numbers#
Memory:
Address 100: ADD 7, 4
Address 101: STORE 200
Address 102: LOAD 300
...
Address 200: [Empty - will store result]
Address 300: [Some data]
CYCLE 1: First Instruction (ADD 7, 4)#
Address Bus sends 100 to Memory
Memory sends "ADD 7, 4" via Data Bus
Understands: "Add 7 and 4, store in ACC"
ALU calculates: 7 + 4 = 11
CYCLE 2: Second Instruction (STORE 200)#
Address Bus sends 101 to Memory
Operand = 200 (memory address)
Understands: "Store ACC value to memory location 200"
ACC value (11) written to memory address 200
CYCLE 3: Third Instruction (LOAD 300)#
Address Bus sends 102 to Memory
Operand = 300 (memory address)
Understands: "Load data from memory location 300 into ACC"
Data from memory[300] loaded into ACC
ACC = [whatever was in address 300]
Important Points to Remember#
✅ Always Remember These Facts#
1.
Fetch gets instruction from memory
2.
Decode understands what instruction means
3.
Execute performs the instruction
4.
Cycle repeats billions of times per second
5.
PC increments after fetch (points to next instruction)
6.
Instructions have 2 parts: Opcode (what) + Operand (what to do it to)
❌ Common Mistakes to Avoid#
| Mistake | Correction |
|---|
| "PC increments before fetch" | ❌ PC increments AFTER fetch |
| "Decode happens after execute" | ❌ Decode happens BEFORE execute |
| "All instructions do math" | ❌ Some load, some store, some jump |
| "MDR and MAR do the same thing" | ❌ MAR = address, MDR = data |
| "FDE cycle takes long time" | ❌ Happens in nanoseconds (billions/second) |
Registers Used in FDE Cycle#
Summary Table#
| Register | Used in Stage | Purpose |
|---|
| PC | FETCH | Holds address of next instruction |
| MAR | FETCH | Holds address to access memory |
| MDR | FETCH | Holds instruction/data from memory |
| CIR | FETCH & DECODE | Holds instruction being decoded |
| ACC | EXECUTE | Holds results of calculations |
Buses Used in FDE Cycle#
Summary Table#
| Bus | Used in Stage | Direction | Carries |
|---|
| Address Bus | FETCH | CPU → Memory | Memory address |
| Data Bus | FETCH | Memory → CPU | Instruction/Data |
| Control Bus | FETCH | CPU → Memory | READ/WRITE signal |
Exam Question: How to Answer#
Type 1: Describe the FDE Cycle (3 marks)#
Question: "Describe the three stages of the Fetch-Decode-Execute cycle." [3 marks]"The CPU fetches, decodes, and executes instructions."
1. FETCH: The CPU fetches the next instruction from memory using
the address in the Program Counter.
2. DECODE: The Control Unit reads the instruction and determines
what operation needs to be performed.
3. EXECUTE: The CPU performs the operation specified by the
instruction (such as addition, storing data, or jumping to a
new location). The cycle then repeats.
Type 2: Explain How an Instruction is Fetched (6 marks)#
Question: "Explain how an instruction is fetched using Von Neumann architecture." [6 marks]1. The Program Counter (PC) holds the address of the next
instruction to be fetched. (1 mark)
2. The address held in the PC is sent to the Memory Address
Register (MAR). (1 mark)
3. The memory address is sent using the Address Bus. (1 mark)
4. The Control Unit sends a READ signal via the Control Bus. (1 mark)
5. The instruction is sent from memory to the Memory Data Register
(MDR) via the Data Bus. (1 mark)
6. The instruction is transferred to the Current Instruction
Register (CIR), and the PC increments by 1. (1 mark)
✅ Shows the sequence clearly
Type 3: Execute Instruction (2 marks)#
Question: "What happens during the execute stage when the instruction is ADD 5, 3?" [2 marks]1. The ALU receives the two operands (5 and 3).
2. The ALU adds them together (5 + 3 = 8) and stores the result
in the Accumulator (ACC).
Practice Questions#
Question 1: Fetch Stage#
Describe what happens during the FETCH stage of the FDE cycle. [4 marks]Click to see answer
Sample Answer:
"1. The Program Counter holds the address of the next instruction to fetch.
2. This address is copied to the Memory Address Register.
3. The address is sent via the Address Bus to memory.
4. The Control Unit sends a READ signal on the Control Bus.
5. Memory returns the instruction via the Data Bus to the MDR.
6. The instruction is copied to the Current Instruction Register.
7. The Program Counter increments by 1 to point to the next instruction."✅ Describes sequence of events
✅ Mentions all key registers
✅ Shows how buses are used
Question 2: Decode Stage#
Explain what happens during the DECODE stage. [2 marks]Click to see answer
Sample Answer:
"The Control Unit reads the instruction in the Current Instruction Register and breaks it into two parts: the opcode (what operation to perform) and the operand (what data to use). The Control Unit then understands what needs to be done and prepares to execute the instruction."✅ Explains opcode and operand
✅ Shows understanding of the process
Question 3: Execute Stage#
What might happen during the EXECUTE stage? Give three examples. [3 marks]Click to see answer
Sample Answer:
"1. The CPU might perform a calculation (such as addition or subtraction) using the ALU, with the result stored in the Accumulator.2.
The CPU might store data or results from the Accumulator to a memory location.
3.
The CPU might load data from a memory location into the Accumulator."
✅ Gives three different examples
✅ Each example is valid for execute stage
✅ Shows variety of possible operations
Question 4: Full Cycle Explanation#
Trace through one complete FDE cycle for the instruction LOAD 300, explaining what happens at each stage. [6 marks]Click to see answer
The Program Counter contains the address (say, 100) of the next instruction
This address is placed in the MAR
The address is sent via Address Bus to memory
The Control Unit sends a READ signal via Control Bus
Memory returns "LOAD 300" via Data Bus to MDR
Control Unit reads the instruction in CIR: "LOAD 300"
Opcode: LOAD (meaning retrieve data)
Operand: 300 (memory location)
Understanding: Load data from address 300 into ACC
The CPU accesses memory location 300
The data stored there is retrieved
This data is loaded into the Accumulator
✅ Explains all three stages
✅ Shows complete flow of data
✅ Mentions all key components
✅ Logical sequence throughout
Key Terms - Definitions#
| Term | Simple Meaning |
|---|
| Opcode | The operation part of instruction (ADD, LOAD, STORE, etc.) |
| Operand | The data part of instruction (numbers, addresses, etc.) |
| Increment | Add 1 to the number (PC goes 100 → 101) |
| Fetch | Get an instruction from memory |
| Decode | Understand what the instruction means |
| Execute | Perform the instruction |
| Cycle | Process that repeats over and over |
| Nanosecond | One billionth of a second |
| ALU | Component that does math operations |
| Accumulator | Register that stores calculation results |
Exam Tips#
✅ DO THIS#
1.
Use correct terminology: "Fetch-Decode-Execute cycle" not "FDE process"
2.
Mention registers by name: "Program Counter", "Memory Address Register"
3.
Explain the sequence: Show the order of events
4.
Mention buses: Show how data moves
5.
Give examples: Real instructions help show understanding
6.
Be specific: "ADD 5, 3" not just "an instruction"
7.
Count your marks: 2 marks = 2 points, 3 marks = 3 points
❌ DON'T DO THIS#
1.
Don't be vague: "The CPU does something" is not enough
2.
Don't skip stages: Explain fetch, decode, AND execute
3.
Don't mix up order: It's always Fetch → Decode → Execute
4.
Don't forget PC increment: This is important in fetch
5.
Don't assume understanding: Explain HOW and WHY
6.
Don't use abbreviations only: Write "Program Counter" first time
7.
Don't over-explain: Answer what is asked
How to Learn This Topic#
Day 1: Understand Each Stage#
Understand what each stage does
Day 2: Learn the Details#
Learn which registers are used
Learn which buses are used
Learn what happens in each stage in detail
Day 3: Practice Examples#
Try the practice questions
Trace through instructions step-by-step
Day 4: Exam Preparation#
Time yourself (don't spend too long)
Quick Reference Card#
Fetch Stage#
Address Bus sends to memory
Control Bus sends READ signal
Data Bus returns instruction to MDR
MDR → CIR (copy instruction)
Decode Stage#
Control Unit reads instruction
Splits into Opcode + Operand
Execute Stage#
Might load (memory → register)
Might store (register → memory)
Then Repeat#
Cycle repeats billions of times per second
Visual Summary - All 3 Stages#
Are You Ready?#
Checklist - Do You Know?#
If you checked all boxes ✅ - You're ready for exam!
Common Questions Answered#
Q: Does FDE cycle always have 3 stages?#
A: Yes, always. Every instruction goes through Fetch, Decode, Execute.Q: Can you skip a stage?#
A: No. All three stages are required for every instruction.Q: Why does PC increment after fetch?#
A: So it points to the next instruction. This way, instructions are executed in order.Q: What if PC doesn't increment?#
A: We would keep executing the same instruction forever. PC increment is critical.Q: Can operand be an address?#
A: Yes. Operand can be a number OR a memory address where data is stored.Q: Why split instruction into opcode and operand?#
A: Because CPU needs to know WHAT to do (opcode) and WHAT to do it to (operand).Q: How fast is FDE cycle?#
A: Modern CPUs run FDE billions of times per second (GHz = gigahertz = billions). Modified at 2026-04-03 09:43:27